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Benchmark setting breakdown voltage performance, protectingsub 20 nm I/O’s. Finer geometry chip designs run the risk ofdamage at voltage levels higher than 3.3V. The SP33R6 providesheadroom to support all of the low voltage differential signaling(0.3V) while protecting the data lines from damaging over voltage,starting at 0.6V.
- ESD, IEC 61000-4-2, ±12kVcontact, ±15kV air
- EFT, IEC 61000-4-4, 40A(5/50ns)
- Lightning, 3A (8/20μs asdefined in IEC 61000-4-5, 2nd Edition)
- Low capacitance of 0.2pF(TYP) per I/O
- Halogen free, lead free andRoHS compliant
SP33R6 Parts
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Filters
SP33R6 Applications
- USB 3.2, USB 4.0
- Thunderbolt 3.0
- PCIE
